- Location: ISDE Main Conference Room TN
- Room: 213 A&B
- Contact: Graduate School
- Email: firstname.lastname@example.org
- Audience: Free and Open to the Public
"Trading off Power Consumption, Speed, and Single-Event Effect Tolerance of CMOS Sequential Logic Circuits in Advanced Technology"
Hui Jiang - Bharat Bhuva, Chair/Adviser of the PhD Committee